0001 – Clock and Reset

Most blogs related to building a simple 8-bit computer start off with simple circuits, such as the clock and reset. So that’s where I’m going to begin as well.

Beginning breadboarding - the 6502, reset circuit and a quick binary display at the top.


The 6502 (as with most microprocessors) requires an external clock pulse to advance its internal program counter through each address space. It is the heartbeat of the computer. This clock pulse is usually supplied by some sort of crystal oscillator.

The Apple /// uses an NMOS 6502B – a 3MHz -rated microprocessor. However, other components of the /// require their own clock frequencies, such as the video system, the 6551 ACIA (serial) controller and the floppy drive. These frequencies are supplied by a single 14MHz crystal oscillator that are divided up among the various components. The 6551 ACIA has it’s own 1.8MHz crystal oscillator. The circuit diagram for this frequency divider is in the Service Reference Manual.

Generally, and specifically for Apple II emulation, the Apple /// does most of its processing at 1MHz. But other times, the /// can operate just under 2MHz. In order to achieve 2MHz though, the video system is temporarily disabled which frees up the extra 1MHz.

For my initial project, I’d like to keep the design simple. Which means I will forego the divider circuitry and build my learning platform upon a 1MHz crystal oscillator. The ACIA will have it’s own 1.8MHz crystal. Yet, as I build my computer, I will want the ability to slow the clock down so that I can monitor what’s being put onto the address and data busses. 1MHz may seem like a snail’s pace by today’s standards. But when we’re troubleshooting a design, it’s screaming fast.

The NMOS 6502B is rated with a minimal clock frequency of 50kHz which is still too fast to visually monitor the bits on the address and data busses.  But anything slower, and the data in its registers can’t hold for very long. A CMOS 65c02, however, can be stopped indefinitely, allowing the chip to be single-pulsed. In my 6502B, I am going to implement both a 1MHz crystal oscillator to provide full-speed clock, as well as an Arduino microcontroller board to provide a variable speed clock, switching between one and the other as needed.

I should mention here that an Arduino-type microcontroller board can be a valuable tool in building a single board computer by providing the hardware pieces we haven’t yet built in order to test our progress. My particular board is an Arduino Mega that has plenty of built-in digital pins so I don’t have to deal with the additional bit-shifting overhead that could add bugs into testing.

In my attempt to keep my Apple /// as period-accurate as possible, I’ve made the decision to use NMOS parts and 74LSXX logic rather than their modern high-speed counterparts. I know some readers would shake their heads at this, quoting the better reliability of modern CMOS parts. But again, one design goal is to keep costs down by using as many parts I already have from a previous Apple /// spare parts board.


When a computer is first turned on, its CPU registers and program counter are in a random state. Some sort of reset needs to occur to set things back to “normal”. For the 6502, this means resetting the program counter to address $FFFC (and then $FFFD) to get the 16 bit address of where it should start reading its first instruction code. Keep in mind that the 6502 is an 8-bit microprocessor with a 16-bit address space. That means it has over 64k address “cubbyholes” that can hold an 8-bit byte of data each.

In order to hold a starting address, we need to break down that 16-bit address into two 8-bit bytes, then put those two bytes into two address spaces: $FFFC (the lower byte) and $FFFD (the upper byte). Once those two address locations are read, the 6502 then zips off to that location to get its first instruction.

(From the Apple /// ROM):
$FFFD – F4
This tells the 6502 to go to address location $F4EE, read the opcode instruction stored there, and continue.

The 6502 has a pin (40) that, when held LOW (0v), clears its internal registers and sets its internal program counter to address $FFFC to read the first byte of address space. The rest of the time, pin 40 is kept HIGH. Therefore. pin 40 is known as “RESET LOW”.

A simple pushbutton held to ground is not sufficient. The reset needs to be held low for a few microseconds of clock time for those internal registers to clear out. So we will use a one-shot 555 monostable circuit, providing about 450uS (about a half-second) of delay. This circuit comes from several other blogs, most of which are based upon the same reset circuit in a Commodore 64 and the Apple I.

[Reset circuit goes here]

This circuit provides a debounced reset when the board is first powered up or whenever we click the reset button.

The Apple /// used a somewhat similar reset circuit which also monitored how the CTRL and Open-Apple keys were held as the Reset button was being pushed, allowing different reset modes. It uses a 556 dual-timer. One half of the timer providing the reset and the other half providing the blink rate of the cursor.

Once the Clock and Reset circuit are added to my breadboard, I’ll add in the 6502 and configure it for free-run – the “hello world” of computer design.


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